Intrinsity's main selling point was its Fast14 technology, a set of design tools implemented in custom EDA software, for using dynamic logic and novel signal encodings to permit greater processor speeds in a given process than naive static design can offer.
Concepts used in Fast14 are described in a white paper:[2] and include the use of multi-phase clocks so that synchronisation is not required at every cycle boundary (that is, a pipelined design does not require latches at every clock cycle); 1-of-N encoding where a signal with N states is carried as a voltage on one of N wires with the other N-1 grounded, rather than being carried on log(N) wires which can be in arbitrary states; and a variety of sophisticated routing algorithms including ones which permute the order of the wires in a bundle carrying a 1-of-N signal in such a way as to reduce noise exposure, and ones which allow complicated gates to 'borrow' delay from simple ones to allow a shorter clock cycle than a more pessimistic design approach permits. Converters between the two signal encodings are readily available, and are useful for interfacing to blocks of static logic.
This technology has been used to implement ARM, MIPS and Power ISA cores, which Intrinsity licences under the name of FastCores; the first implementation was FastMATH, a MIPS-based DSP-like microprocessor implemented in 130 nm technology and introduced in 2002.[3] It operates at 15 W power at 2.0 GHz and 1 V, and 6 W power at 1 GHz and 0.85 V; it was awarded Best Extreme Processor in 2003 by Microprocessor Report.[4] The design took 16 months by a team of 45 engineers.
In July 2009, Intrinsity announced that it had developed in collaboration with Samsung a 1 GHz implementation of the ARM Cortex-A8 chip;[5] it had developed a similar high-speed implementation of the Cortex-R4 chip two years earlier.[6]
