A complex instruction set computer (acronym CISC pronounced sisk), represents a CPU design method in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. The term is used in contrast to reduced instruction set computer (RISC).

The terms RISC and CISC have become less meaningful with the continued improvements of both CISC and RISC designs and implementations. The first highly pipelined "CISC" implementations, such as Intel 80486 series, supports every instruction that their predecessors did, but achieved high efficiency only on a few simple x86 subset (similar to a RISC instruction set, but without the load-store limitations of RISC). Modern x86 processors also decode and split more complex instructions into a series of smaller internal "Micro-operations" which can thereby be executed in a pipelined (parallel) fashion, thus achieving high performance on a much larger subset of instructions.

Examples of CISC processors are the System/360 (excluding the 'scientific' Model 44), VAX, PDP-11, Motorola 68000 family, and Intel x86 architecture based processors.

• CPU
• RISC
• ZISC
• VLIW
• microprocessor
• CPU design

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