Shubu Mukherjee (born November 10, 1968) is a pioneer in computer architecture design and analysis techniques. He is also known as Shubhendu S. Mukherjee. He is currently the Vice President of Architecture in SiFive, Inc. and serves in the RISC-V Technical Steering Committee.[1]
In Intel, in conjunction with Joel Emer, Steven Reinhardt, and others, Mukherjee published one of his well-known papers on architectural vulnerability,[9] which shows how to reason about and design for soft errors in semiconductor chips from cosmic radiation and alpha particles. Subsequently, Mukherjee’s work on soft errors led to Mukherjee’s book on the same topic titled "Architecture Design for Soft Errors."[10]
Mukherjee has worked on most aspects of computer chip design, including as an Alpha architect for on-chip networks and coherence protocols,[11] lead architect for ARM-based processor cores used in OCTEON 9x family of processors, reliability architect, and performance architect.[12] Mukherjee has over 50 publications and 100 patents in the field of computer architecture.[13]
^Mukherjee, S.S.; Weaver, C.; Emer, J.; Reinhardt, S.K.; Austin, T. (2003). "A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor". 22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449). IEEE Comput. Soc. pp. 29–40. doi:10.1109/MICRO.2003.1253181. ISBN978-0-7695-2043-8.
^Mukherjee, Shubu (29 August 2011). Architecture Design for Soft Errors. Elsevier Science. ISBN9780080558325.
^Mukherjee, S.S.; Bannon, P.; Lang, S.; Spink, A.; Webb, D. (2001). "The Alpha 21364 network architecture". HOT 9 Interconnects. Symposium on High Performance Interconnects. IEEE Comput. Soc. pp. 113–117. doi:10.1109/HIS.2001.946702. ISBN978-0-7695-1357-7.
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