The ARM Cortex-X925, codenamed "Blackhawk", is a high-performance CPU core designed by Arm and introduced in 2024. It is part of the second-generation ARMv9.2 architecture and is built on a 3 nm process node. The Cortex-X925[1] is designed to excel in single-threaded instruction per clock (IPC) performance, making it ideal for high-performance mobile computing.
Key features
10-wide decode and dispatch width: This allows the core to process more instructions per cycle, increasing overall throughput.[2]
Doubled instruction window size: This reduces stalls and improves the efficiency of the execution pipeline.[2]
Increased L1 instruction cache (I$) bandwidth: The core features a 2x increase in L1 I$ bandwidth, ensuring quick instruction fetch and decode.[2]
Enhanced branch prediction unit: Techniques such as folded-out unconditional direct branches reduce mispredicted branches, leading to fewer pipeline flushes and higher sustained IPC.[2]
Support for ARMv9.2-A instruction set: The core supports A64 instruction set and AArch64 execution state at all exception levels.[3]
Scalable Vector Extension (SVE) and SVE2: These extensions provide advanced SIMD and floating-point support.[3]
Error protection: The core includes error protection on L1 instruction and data caches, L2 cache, and MMU Translation Cache (MMU TC) with parity or ECC.[3]
The Cortex-X925 is designed to be used in both homogeneous and heterogeneous DynamIQ™ clusters, providing flexibility in various system configurations.[3]
Released in 2024 as part of Arm's "total compute solution." It serves as the successor of ARM Cortex-X4. X-series CPU cores generally focus on high performance, and can be grouped with other ARM cores, such as ARM Cortex-A725 and/or ARM Cortex-A520 in a System-on-Chip (SoC).
