Yonah is the code name of Intel's first generation 65 nm process CPU cores, based on cores of the earlier Banias (130 nm) / Dothan (90 nm)Pentium M microarchitecture. Yonah CPU cores were used within Intel's Core Solo and Core Duo mobile microprocessor products. SIMD performance on Yonah improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations; integer performance decreased slightly due to higher latency cache. Additionally, Yonah included support for the NX bit.
Models and brand names
The Intel Core Duo brand referred to a low-power (less than 25 watts) dual-core microprocessor, which offered lower power operation than the competing AMDOpteron 260 and 860 HE at 55 watts. Core Duo was released on January 5, 2006, with the other components of the Napa platform. It was the first Intel processor to be used in Apple Macintosh products (although the Apple Developer Transition Kit machines, non-production units distributed to some developers, used Pentium 4 processors).[1]
There were two variants and one derivative of the Yonah, which did not bear the "Intel Core" brand name:
A dual-core (server) derivative, code-named Sossaman, was released on March 14, 2006, as the Xeon (branded) LV (low-voltage). The Sossaman differed from the Yonah only in its support for dual-socket configurations (two CPUs providing a total of four cores per motherboard, like AMD Quad FX), and implementation of 36-bit memory addressing (PAE mode).
A single-core variant, code-named Yonah-1024, was released as the Celeron (branded) M 400 series CPUs. It was largely identical to the Core Solo branded Yonah, except that it only had half the L2 cache and did not support SpeedStep and Intel VT-x.
Another dual-core variant of Yonah was branded as Pentium Dual-Core T2060, T2080, and T2130 mobile CPUs with Intel VT-x support.[2]
Core Duo contains 151 million transistors, including the shared 2 MBL2 cache. Yonah's execution core contains a 12-stage pipeline, forecast to eventually be able to run at a maximum frequency of 2.33–2.50 GHz. The communication between the L2 cache and both execution cores is handled by a bus unit controller through arbitration, which reduces cache coherency traffic over the FSB, at the expense of raising the core-to-L2 latency from 10 clock cycles (in the Dothan Pentium M) to 14 clock cycles. The increase in clock frequency offsets the impact of the increased clock cycle latency. The power management components of the core features improved grained thermal control, as well as independent scaling of power between the two cores, resulting in very efficient management of power.
Core processors communicate with the system chipset over a 667 MT/s front side bus (FSB), up from 533 MT/s used by the fastest Pentium M.
T2050 & T2250 have also appeared in OEM systems as a low-cost option with a lower 533 MT/s FSB and no Intel VT-x.
Yonah is supported by the 945GM, 945PM, 945GT, 965GM, 965PM, and 965GT system chipsets. Core Duo and Core Solo use Socket M, but due to pin arrangement and new chipset functions are not compatible with any previous Pentium M motherboard.
The T2300E was later introduced as a replacement for the T2300. It has dropped support for Intel VT-x. Early Intel specifications mistakenly claimed a halving of the Thermal Design Power.
Intel 64 (Intel's x86-64 implementation) is not supported by Yonah. However, Intel 64 support is integrated in Yonah's successor, the mobile version of Core 2, code-named Merom.
The Duo version of Intel Core (Yonah) includes two computational cores, providing performance per watt almost as good as any previous single core Intel processors. In battery-operated devices such as notebook computers, this translates to getting as much total work done per battery charge as with older computers, although the same total work may be done faster. When parallel computations and multiprocessing are able to utilize both cores, the Intel Core Duo delivers much higher peak speed compared to the single-core chips previously available for mobile devices. However, Core (Yonah) did not make any further improvements to single threaded processing performance over Dothan beyond before-mentioned SSE unit enhancements, and it was still only a 32-bit architecture, which proved to be particularly limiting for its server-oriented Sossaman derivative as x86-64 operating systems and software became increasingly prevalent.[citation needed]
According to Mobile Roadmaps from 2005, Intel's Yonah project originally focused more on reducing the power consumption of its P6-based Pentium M processor and aimed to reduce it by 50% for Intel Core (Yonah). Despite being less power efficient, Intel continued to market the NetBurst-based Mobile Pentium 4 processors for high performance applications until the Yonah project succeeded in extracting higher performance from its lower-power design. The Intel Core Duo's inclusion of two highly efficient cores on one chip can provide better performance than a Mobile Pentium 4 core, and with much better power-efficiency.
On July 27, 2006, Intel's Core 2 processors were released, which offered x86-64 compatibility and eventually displaced Yonah in production.
