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There seems to be overlap with this article and Virtual memory. Virtual address redirects there, but is used a synonym for Logical address in this article. Econrad 1 July 2005 21:05 (UTC)

I think the author doesn't really make any difference beetween logical and virutal addreses. Logical addreses are not the same as Virtual (AKA linear) addresses! —The preceding unsigned comment was added by Stdazi (talk • contribs) 18:34, 22 April 2007 (UTC).Reply

What exactly are the differences between a logical address and a virtual address? What exactly is the distinction between a linear address and these other kinds of addresses? What kind(s) of addresses are used in bank switching? And more importantly, what WP:SOURCES discuss and define both terms "logical address" and "virtual address"? (There's a discussion at "Talk:PDP-11#Use of term .22virtual address space.22 for 64k addresses" that attempts to draw a distinction between "physical address", "virtual address", and "logical address", but I find the conclusion a little confusing. So I came here to try to find a little clarity). --DavidCary (talk) 02:00, 9 January 2015 (UTC)Reply

It's a mess.

In most systems, a physical address is the address handed to the memory hardware when a read or write is done. IBM System/360 and its successors add a wrinkle in which, in a multiprocessor system, addresses to a low-end chunk of the "physical" address space have a per-processor "prefix" value added to them, so that address 0, for example, refers to a different chunk of hardware-level memory on CPU 0 than on CPU 1, and yet another chunk on CPU 2, etc. ^[1][2][b] assigned to each CPU. They use the term "real address" for a "physical" addresse before prefixing and "absolute address" for a physical address after prefixing. (At layers below the instruction set architecture, there may be more mapping.)

On early machines, instruction and operand addresses were, by and large, physical addresses.

Then various forms of mapping were added, such as Base and bounds registers, segmentation (upper part of the address selects a segment from a segment table, with the entries for segments that are in memory having the starting physical address of the segment and the length of the segment, lower part of the address is an offset into the segment), paging (upper part of the address used to find an entry in a one-or-more-level map giving the starting physical address of the page, lower part of the address giving the offset in the page), segmentation+paging (start with segmentation, but have the segment table entry point to a page table for the segment rather than giving the starting physical address of the segment), etc.

For paging and segmentation+paging, the address fed to the translation mechanism was usually called a virtual address. I'm not sure whether that term was used for purely-segmented mapping.

And then there's x86 protected mode. The 80286 had segmentation, so that's pretty much as described. The 80386 and all subsequent 32-bit x86 processors can do paging on top of segmentation, but that's not the same as segmentation+paging as described above. Instead, segment table entries give the starting "linear address" of the segment. Instead of adding the starting physical address of the segment to the offset within the segment (after the offset was checked to make sure it's within the bounds of the segment) to get the physical address of the item being referred to, the starting linear address is added to the segment offset to get the linear address of the item being referred to. That linear address is then run through the page table to find the physical address. I don't remember offhand how much of the segmentation stuff is done in long mode on 64-bit x86 processors.

(I didn't link "linear address" to linear address above as it is mostly non-x86-specific and, when it mentions x86, it mentions it in a completely different context. In a flat memory model on x86 - which is what almost all OSes use on 32-bit and 64-bit x86 processors, including the OS and x86 processor(s) in the machine on which I'm typing this, use - the addresses used by programs, at least in 32-bit mode, are, technically, segmented addresses, but the segments are set up so that they overlap, so in effect the 32-bit addresses are mapped directly to the linear address, modulo however the implementation of thread-local storage uses one of the segment registers. But linear address doesn't talk about how segmented addresses are mapped to linear addresses, so, again, it's not really talking about x86 linear addresses in their full glory.)

I'm not sure where the term "logical address" is used. As described in the article, it sounds as if it's the address that's handed to the mapping process; if that's how it's used in the real world (as established by reliable sources), it's a good term to use when talking about mapped addresses in general ("mapped" as in "the input to the mapping process" rather than "the result of the mapping process").

As for Talk:PDP-11/Archive 1#Use of term "virtual_address_space" for 64k addresses (the new home of the thread you mentioned), it sounds as if (the late) User:Jeh suggested using "logical address" rather than "virtual address" as, in general, it was not used to allow references to chunks of the address space not currently in memory to be faulted into memory:

I'm thinking that the term "logical address space" might be better here, though, as it doesn't imply the possibility of paging (as "virtual" does)...and of course the PDP-11 did not have paging, i.e., there was no concept of a virtual or logical address being mapped to a page not currently resident in RAM.

although, as he noted earlier, the term "virtual address" was used in some circles:

It's true that the PDP-11 architecture handbook doesn't use the term "virtual" there. But "virtual" is what we always called the pre-translation addresses in the PDP-11 forums around DECUS.

So, in order of importance:

• what WP:SOURCES discuss and define both terms "logical address" and "virtual address"? Good question! I'll see if I can spend some free time finding them; any help from others would be useful.
• What exactly are the differences between a logical address and a virtual address? It depends on what those sources say a "logical address" is. They'll probably agree on "virtual address" being what gets handed to the translation process on systems with virtual memory.
• What exactly is the distinction between a linear address and these other kinds of addresses? On systems where the memory model is always flat, and virtual-memory address mapping is being done, a linear address, in the "flat memory model" sense, is the virtual address. On systems with a flat memory model and some flavor of hidden segmentation (32-bit x86+most OSes, at least some PA-RISC+UN*Xes if I remember correctly, at least some IBM POWER architecture/PowerPC/Ppwer ISA systems+UN*X if I remember correctly, maybe others), there's probably a fairly-trivial mapping between the virtual addresses used to refer to code and data and the linear addresses coming out of the segmentation. I'm not sure whether there are any systems where it's more complicated than that (if you don't have a flat memory model you have segmented addresses, not linear addresses). In a system with no memory mapping, the linear address is (other than the prefixing mentioned above) the physical address.
• What kind(s) of addresses are used in bank switching? I'm not sure what the terminology was, but the address used to refer to code and data would, I guess, be a logical address, and whatever bank-switching registers the machine had would map those to a physical address.

(All of the above is probably a bit oversimplified, and I'm sure there are systems out there that I haven't considered where it's different in some way.)

Unfortunately, I don't know where, if anywhere, the whole notion of address mapping has been considered in a systematic way (other than in Wikipedia articles and talk pages, but they obviously don't count as reliable sources...), so I'm not sure what sources there might be for something to cover that. Guy Harris (talk) 09:45, 9 January 2026 (UTC)Reply

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