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Advanced packaging^[1] is the aggregation and interconnection of components before traditional integrated circuit packaging where a single die is packaged. Advanced packaging allows multiple devices, including electrical, mechanical, or semiconductor devices, to be merged and packaged as a single electronic device. Advanced packaging uses processes and techniques that are typically performed at semiconductor fabrication facilities, unlike traditional integrated circuit packaging, which does not. Advanced packaging thus sits between fabrication and traditional packaging -- or, in other terminology, between BEoL and post-fab. Advanced packaging includes multi-chip modules, 3D ICs,^[2] 2.5D ICs,^[2] heterogeneous integration,^[3] fan-out wafer-level packaging,^[2] system-in-package, quilt packaging, combining logic (processors) and memory in a single package, die stacking, wafer bonding/stacking, several chiplets or dies in a package,^[2] combinations of these techniques, and others. 2.5D and 3D ICs are also called 2.5D or 3D packages.^[3]

Advanced packaging can help achieve performance gains through the integration of several devices in one package and associated efficiency gains (by reducing the distances signals have to travel, in other words reducing signal paths), and allowing for high numbers of connections between devices, without having to resort to smaller transistors which have become increasingly more difficult to manufacture.^[4] Fan-out packaging is seen as a low cost option for advanced packaging.^[5]

Advanced Packaging is considered fundamental in expanding the Moore’s Law.^[6]^[2] An example of heterogeneus integration is Intel's EMIB, which uses "bridges" made on silicon substrates, to connect different dies together.^[7] Another example is TSMC's CoWoS ^[8]^[9](chip-on-wafer-on-substrate) technology which uses an interposer.^[10]^[11] Advanced packaging is closely related to system integration,^[12] used in systems related to "artificial intelligence, machine learning, automotive, and 5G" to name a few.^[13] System integration consists of "ways to avoid putting everything on a single chip by creating a system that interconnects multiple smaller chips, or chiplets"^[14] Advanced packages can have chiplets from several vendors.^[15]^[16] To enable this, standards for connecting chiplets have been developed such as UCie.^[17]